Logic device/transceiver/encoder
TI (Texas Instruments)
Proizvođači
SN74AHC244 Octal Buffer/Driver with 3-State Outputs
Opis
TI (Texas Instruments)
Proizvođači
SN74HC244 Octal Buffer and Line Driver with 3-State Outputs
Opis
TI (Texas Instruments)
Proizvođači
8-Channel, 4.5V to 5.5V Buffer with TTL Compatible CMOS Inputs 20-SO -40 to 85
Opis
TI (Texas Instruments)
Proizvođači
HGSEMI (Huaguan)
Proizvođači
DIODES (US and Taiwan)
Proizvođači
TI (Texas Instruments)
Proizvođači
TXB0304 4-Bit Bidirectional Auto Direction Sense Converter with Fully Symmetrical 0.9V to 3.6V Range
Opis
TI (Texas Instruments)
Proizvođači
SN74CBTLV3257 4-Channel 2:1 Analog Switch with Brownout Protection
Opis
TI (Texas Instruments)
Proizvođači
SN74AHCT126 Quad Bus Buffer Gate with Three-State Outputs
Opis
RUNIC (Runshi)
Proizvođači
TOSHIBA (Toshiba)
Proizvođači
onsemi (Ansemi)
Proizvođači
The MM74HC08 AND gates are manufactured using an advanced silicon gate CMOS process, operating at speeds comparable to LS-TTL gates, with low power consumption of standard CMOS integrated circuits. The HC08 has buffered outputs for high noise immunity and is capable of driving 10 LS-TTL loads. The 74HC logic family is functionally and pin-out compatible with the standard 74LS logic family. All inputs are protected from electrostatic discharge damage by clamping internal diodes to VCC and ground.
Opis
XINLUDA (Xinluda)
Proizvođači
Decoder/Demultiplexer 1 x 4: 10 1
Opis
TI (Texas Instruments)
Proizvođači
High Speed CMOS Logic Dual Retriggerable Monostable Multivibrator with Reset 16-PDIP -55 to 125
Opis
onsemi (Ansemi)
Proizvođači
The high-performance silicon-gate CMOS MC74C4020A has the same pin-out as the standard CMOS MC14020B. The device inputs are compatible with standard CMOS outputs; pull-up resistors are included for compatibility with LSTTL outputs. The device consists of 14 master-slave flip-flops with 12 stages that are brought out to the pin. The output of each flip-flop feeds the next flip-flop, with half the frequency at each output of the previous one. Reset is asynchronous and active high. Due to internal ripple delays, the state changes of the Q outputs do not occur simultaneously. Therefore, the decoded output signal is prone to decode spikes and may have to be gated with the HC4020A's clock for some designs.
Opis